montreal - RV32E core for TinyTapeout, codename "Montréal". Mirror of https://github.com/ubc-asic/montreal.git.

Branch	Commit message	Author	Age
feature/core	Minor refactor to regfile formal test module	Warrick Lo	4 weeks
feature/fu	Sync with 'master'	Warrick Lo	10 days
feature/shifter	Implement slice-serial shifter	Warrick Lo	12 days
master	Add DCO [skip ci]	Warrick Lo	3 weeks


Age	Commit message	Author	Files	Lines
10 days	Sync with 'master'feature/fu	Warrick Lo	14	-16/+78
2026-06-26	Add DCO [skip ci]HEAD master	Warrick Lo	1	-0/+34
2026-06-25	Merge branch 'feature/fu' from MyDariell	Warrick Lo	5	-39/+348
2026-06-24	Add CI pipeline for formal verification	Warrick Lo	13	-16/+44
2026-06-22	Clean up ALU before merge	MyDariell	4	-76/+24
2026-06-22	Implement XOR, OR, AND logical operations in sliced ALU	MyDariell	2	-3/+163
2026-06-21	Implement ADD and SUB operations in sliced ALU	MyDariell	2	-6/+207
2026-06-20	Merge branch 'feature/core'	Warrick Lo	5	-17/+329
2026-06-20	Add basic ALU skeleton	Warrick Lo	2	-0/+89
2026-06-20	Minor refactor to regfile formal test modulefeature/core	Warrick Lo	2	-56/+83
[...]

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