montreal/rtl/regfile.sv, branch feature/core

Move typedefs to types.svh from montreal_pkg

2026-06-18T16:39:41+00:00

Yosys has poor support of packaged types. We will move typedefs to header files to prepare for formal verification with sby and the Tiny Tapeout flow later on, which uses yosys. Additionally, a debug port has been exposed to help verify the internal state of the regfile registers. Signed-off-by: Warrick Lo

Move design parameters to config_pkg

2026-06-17T00:44:02+00:00

Signed-off-by: Warrick Lo

regfile: refactor: 'chunks' are now 'slices'

2026-06-16T22:13:10+00:00

The term 'slice' is more consistent with old CPU architectures and academic literature. Signed-off-by: Warrick Lo

Add asynchronous reset to register file

2026-06-15T21:57:20+00:00

Signed-off-by: Warrick Lo

Add register file with chunk access

2026-05-14T18:32:48+00:00

Implements a RISC-V register file with byte-selectable chunk access for an 8-bit datapath architecture. Signed-off-by: Warrick Lo