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diff --git a/rtl/rv32e_core_wrapper.sv b/rtl/rv32e_core_wrapper.sv
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+/* SPDX-License-Identifier: CERN-OHL-P-2.0 */
+
+/*
+ * Copyright 2026 UBC ASIC contributors (Montreal project).
+ * All rights reserved.
+ *
+ * Authors: Chathil Rajamanthree <chathil.rajaman3@gmail.com>
+ *
+ * Montreal RV32E Core Wrapper
+ *
+ * Provides a clean, generic bus interface for the core for easier UVM access.
+ */
+
+module rv32e_core_wrapper ();
+
+endmodule : rv32e_core_wrapper