diff options
Diffstat (limited to 'rtl')
| -rw-r--r-- | rtl/simple_alu.sv | 64 |
1 files changed, 39 insertions, 25 deletions
diff --git a/rtl/simple_alu.sv b/rtl/simple_alu.sv index 8dc0586..a5ae9e7 100644 --- a/rtl/simple_alu.sv +++ b/rtl/simple_alu.sv @@ -4,41 +4,55 @@ module simple_alu ( //inputs - input logic clk, - input logic [31:0] a, - input logic [31:0] b, - input logic sel, //sel = 0 -> ADD, sel = 1 -> SUB - input logic rst, //active LOW sync reset + input logic clk_i, + input logic [31:0] a_i, + input logic [31:0] b_i, + input logic sel_i, //sel = 0 -> ADD, sel = 1 -> SUB + input logic rst_ni, //active LOW sync reset //outputs - output logic [31:0] y, - output logic overflow + output logic [31:0] y_o, + output logic overflow_o ); logic [32:0] sum; logic [32:0] diff; + logic [31:0] y_r; + logic overflow_r; + logic [31:0] y_next; + logic overflow_next; always_comb begin - sum = {1'b0, a} + {1'b0, b}; - diff = {1'b0, a} - {1'b0, b}; - end + sum = {1'b0, a_i} + {1'b0, b_i}; + diff = {1'b0, a_i} - {1'b0, b_i}; - always_ff @(posedge clk) begin - if (~rst) begin - y <= '0; - overflow <= '0; - end - else begin - case (sel) - 0: begin - y <= sum[31:0]; - overflow <= sum[32]; - end - 1: begin - y <= diff[31:0]; - overflow <= diff[32]; + y_next = '0; + overflow_next = '0; + + if (rst_ni) begin + case (sel_i) + 0: begin + y_next = sum[31:0]; + overflow_next = sum[32]; + end + 1: begin + y_next = diff[31:0]; + overflow_next = diff[32]; + end + default: begin + y_next = '0; + overflow_next = '0; + end + endcase end - endcase end + + always_ff @(posedge clk_i) begin + y_r <= y_next; + overflow_r <= overflow_next; end + + assign y_o = y_r; + assign overflow_o = overflow_r; + endmodule |