/* SPDX-License-Identifier: CERN-OHL-P-2.0 */

/*
 * Copyright 2026 UBC ASIC contributors (Montreal project).
 * All rights reserved.
 *
 * Authors: Chathil Rajamanthree <chathil.rajaman3@gmail.com>
 *
 * Montreal RV32E Core Wrapper
 *
 * Provides a clean, generic bus interface for the core for easier UVM access.
 */

module rv32e_core_wrapper ();

endmodule : rv32e_core_wrapper