.gitignore


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*~
*.bak
*.swp
*.swo
.vscode
.claude/

# iverilog build artifacts
*.vvp
obj_dir/

# SymbiYosys output
verif/formal/simple_alu/simple_alu/
verif/formal/simple_alu/simple_alu_bmc/
verif/formal/simple_alu/simple_alu_cover/