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authorgithub-classroom[bot] <66690702+github-classroom[bot]@users.noreply.github.com>2025-09-10 21:59:56 +0000
committerGitHub <noreply@github.com>2025-09-10 21:59:56 +0000
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+module statemachine(input logic slow_clock, input logic resetb,
+ input logic [3:0] dscore, input logic [3:0] pscore, input logic [3:0] pcard3,
+ output logic load_pcard1, output logic load_pcard2, output logic load_pcard3,
+ output logic load_dcard1, output logic load_dcard2, output logic load_dcard3,
+ output logic player_win_light, output logic dealer_win_light);
+
+// The code describing your state machine will go here. Remember that
+// a state machine consists of next state logic, output logic, and the
+// registers that hold the state. You will want to review your notes from
+// CPEN 211 or equivalent if you have forgotten how to write a state machine.
+
+endmodule
+