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diff --git a/task5/tb_statemachine.sv b/task5/tb_statemachine.sv
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+module tb_statemachine();
+
+// Your testbench goes here. Make sure your tests exercise the entire design
+// in the .sv file.  Note that in our tests the simulator will exit after
+// 10,000 ticks (equivalent to "initial #10000 $finish();").
+
+endmodule