From 7df28b9e812f278a93bdc68dea2c33850d2506af Mon Sep 17 00:00:00 2001 From: Warrick Lo Date: Tue, 3 Feb 2026 07:36:04 -0800 Subject: Redesign state machine Signed-off-by: Warrick Lo --- task5/datapath.sv | 2 ++ 1 file changed, 2 insertions(+) (limited to 'task5/datapath.sv') diff --git a/task5/datapath.sv b/task5/datapath.sv index 03f408d..ea99794 100644 --- a/task5/datapath.sv +++ b/task5/datapath.sv @@ -12,6 +12,8 @@ module datapath(slow_clock, fast_clock, resetb, logic [3:0] new_card, pcard1, pcard2, pcard3, dcard1, dcard2, dcard3; + assign pcard3_out = pcard3; + reg4 PCard1(new_card, load_pcard1, slow_clock, resetb, pcard1); reg4 PCard2(new_card, load_pcard2, slow_clock, resetb, pcard2); reg4 PCard3(new_card, load_pcard3, slow_clock, resetb, pcard3); -- cgit v1.2.3