Move fillscreen to a separate moduleHEADmaster

Signed-off-by: Warrick Lo <wlo@warricklo.net>

1 files changed, 8 insertions, 32 deletions

diff --git a/task3/circle.sv b/task3/circle.sv
index c6218d8..c8dd60d 100644
--- a/task3/circle.sv
+++ b/task3/circle.sv
@@ -14,14 +14,14 @@ module circle(clk, rst_n, colour, centre_x, centre_y, radius, start, done,
 	output logic [6:0] vga_y;
 	output logic [7:0] vga_x;
 
-	logic clear, ready;
+	logic clear;
 	logic [2:0] octant;
 	logic [7:0] offset_x, offset_y, offset_x_next, offset_y_next;
 	/* One bit larger since these are signed. */
 	logic signed [7:0] vga_y_next;
 	logic signed [8:0] vga_x_next, crit, crit_next;
 
-	assign vga_colour = clear ? 3'b000 : colour;
+	assign vga_colour = colour;
 
 	always_comb case (octant)
 		3'd0: begin
@@ -72,44 +72,21 @@ module circle(clk, rst_n, colour, centre_x, centre_y, radius, start, done,
 	end
 
 	always_ff @(posedge clk) begin
-		if (~rst_n) begin
+		if (rst_n !== 1) begin
 			done <= 1'b0;
-			ready <= 1'b0;
 
-			/* Start clearing the screen. */
-			clear <= 1'b1;
+			/* Initialise the registers for the circle algorithm. */
 			vga_x <= 8'b0;
 			vga_y <= 7'b0;
-			vga_plot <= 1'b1;
-		end
-
-		/* Clear the screen. */
-		if (clear) begin
-			if (vga_y < 120) begin
-				/* Check for one column less since it takes
-				 * one clock cycle to reset and increment. */
-				if (vga_x < 159)
-					vga_x <= vga_x + 1;
-				else begin
-					vga_x <= 8'b0;
-					vga_y <= vga_y + 1;
-				end
-			end else begin
-				clear <= 1'b0;
-				ready <= 1'b1;
-				vga_x <= 8'b0;
-				vga_y <= 7'b0;
-				vga_plot <= 1'b0;
-			end
-		/* Initialise the registers for the circle algorithm. */
-		end else if (ready && start && ~done) begin
-			ready <= 1'b0;
+			vga_plot <= 1'b0;
 			octant <= 3'b0;
 			offset_y <= 8'b0;
 			offset_x <= radius;
 			crit <= 1 - radius;
+		end
+
 		/* Draw the circle using the Bresenham circle algorithm. */
-		end else if (start && ~done) begin
+		if (start && ~done) begin
 			if (offset_y <= offset_x) begin
 				if ((vga_x_next >= 0) && (vga_x_next <= `VGA_W))
 					vga_x <= vga_x_next;
@@ -133,7 +110,6 @@ module circle(clk, rst_n, colour, centre_x, centre_y, radius, start, done,
 			/* Finished. */
 			end else begin
 				done <= 1'b1;
-				ready <= 1'b1;
 				vga_plot <= 1'b0;
 			end
 		/* Wait for start to be deasserted. */