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authorWarrick Lo <wlo@warricklo.net>2026-06-02 06:57:06 -0700
committerWarrick Lo <wlo@warricklo.net>2026-06-02 07:05:42 -0700
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tree02ee20b20a9a1ccbe8a42382ccbc37a8ade69f85 /README
parentAdd improvements to SUBMISSION.md (diff)
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+RC4 Decrypt
+===========
+
+A brute-force RC4 stream cipher decryption circuit for FPGAs.
+
+RC4 is a symmetric stream cipher common in internet protocols such as
+SSL, WEP, and WPA. It has since been deem insecure due to multiple
+vulnerabilities discovered.
+
+This circuit runs 108 cracking cores in parallel with interleaved
+key-space partitioning. The circuit assumes the decryption was
+successful if the resulting output are all ASCII printable characters
+(non control characters).
+
+https://git.warricklo.net/rc4-decrypt/
+
+Licence
+-------
+
+Copyright (c) 2026 Warrick Lo and contributors.
+Available under the CERN Open Hardware Licence Version 2 - Permissive.
+
+SPDX-License-Identifier: CERN-OHL-P-2.0