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-# ARC4 Cracking Competition Submission
-
-- We implemented 108 ARC4 cracking cores in parallel.
-- This also required around 108 times the memory usage.
-- In the future, this can be improved by using two-port memory, or by not writing the plaintext until we confirm the key is valid.
-- A PLL was added for frequency synthesis using the 50 MHz clock signal. We used a conservative clock of 90 MHz with the PLL.
-- The cracking can also be pipelined further in the future.