Add task 4 code

Signed-off-by: Warrick Lo <warrick.s.z.lo@gmail.com>

1 files changed, 52 insertions, 10 deletions

diff --git a/task4/statemachine.sv b/task4/statemachine.sv
index 1a01db2..a1c3191 100644
--- a/task4/statemachine.sv
+++ b/task4/statemachine.sv
@@ -1,13 +1,55 @@
-module statemachine(input logic slow_clock, input logic resetb,
-                    input logic [3:0] dscore, input logic [3:0] pscore, input logic [3:0] pcard3,
-                    output logic load_pcard1, output logic load_pcard2, output logic load_pcard3,
-                    output logic load_dcard1, output logic load_dcard2, output logic load_dcard3,
-                    output logic player_win_light, output logic dealer_win_light);
+`define STATE_DEAL_P1	3'b000
+`define STATE_DEAL_D1	3'b001
+`define STATE_DEAL_P2	3'b010
+`define STATE_DEAL_D2	3'b011
+`define STATE_DEAL_P3	3'b100
+`define STATE_DEAL_D3	3'b101
+`define STATE_END	3'b110
 
-// The code describing your state machine will go here.  Remember that
-// a state machine consists of next state logic, output logic, and the 
-// registers that hold the state.  You will want to review your notes from
-// CPEN 211 or equivalent if you have forgotten how to write a state machine.
+module statemachine(slow_clock, resetb, dscore, pscore, pcard3,
+	load_pcard1, load_pcard2, load_pcard3,
+	load_dcard1, load_dcard2, load_dcard3,
+	player_win_light, dealer_win_light);
 
-endmodule
+	input logic slow_clock, resetb;
+	input logic [3:0] dscore, pscore, pcard3;
+	output logic load_pcard1, load_pcard2, load_pcard3,
+		load_dcard1, load_dcard2, load_dcard3,
+		player_win_light, dealer_win_light;
 
+	logic [2:0] state;
+
+	always_ff @(posedge slow_clock) casex ({resetb, state})
+		4'b0_xxx:
+			state <= `STATE_DEAL_P1;
+		{1'b1, `STATE_DEAL_P1}:
+			state <= `STATE_DEAL_D1;
+		{1'b1, `STATE_DEAL_D1}:
+			state <= `STATE_DEAL_P2;
+		{1'b1, `STATE_DEAL_P2}:
+			state <= `STATE_DEAL_D2;
+		{1'b1, `STATE_DEAL_D2}:
+			state <= `STATE_END;
+		{1'b1, `STATE_END}:
+			state <= `STATE_END;
+		default:
+			state <= `STATE_DEAL_P1;
+	endcase
+
+	always_comb begin
+		{player_win_light, dealer_win_light,
+			load_pcard1, load_pcard2, load_pcard3,
+			load_dcard1, load_dcard2, load_dcard3}
+			= 8'b0;
+
+		case (state)
+			`STATE_DEAL_P1: load_pcard1 = 1'b1;
+			`STATE_DEAL_P2: load_pcard2 = 1'b1;
+			`STATE_DEAL_P3: load_pcard3 = 1'b1;
+			`STATE_DEAL_D1: load_dcard1 = 1'b1;
+			`STATE_DEAL_D2: load_dcard2 = 1'b1;
+			`STATE_DEAL_D3: load_dcard3 = 1'b1;
+			`STATE_END: {player_win_light, dealer_win_light} = 2'b11;
+		endcase
+	end
+endmodule: statemachine