diff options
Diffstat (limited to '')
| -rw-r--r-- | task4/scorehand.sv | 1 | ||||
| -rw-r--r-- | task4/task4.qws | bin | 0 -> 639 bytes | |||
| -rw-r--r-- | task4/tb_task4.sv | 144 |
3 files changed, 140 insertions, 5 deletions
diff --git a/task4/scorehand.sv b/task4/scorehand.sv index a472873..a6c40d6 100644 --- a/task4/scorehand.sv +++ b/task4/scorehand.sv @@ -23,5 +23,4 @@ module scorehand(card1, card2, card3, total); else total = sum; end - endmodule: scorehand diff --git a/task4/task4.qws b/task4/task4.qws Binary files differnew file mode 100644 index 0000000..689e37a --- /dev/null +++ b/task4/task4.qws diff --git a/task4/tb_task4.sv b/task4/tb_task4.sv index 0cc9c84..d27fa8d 100644 --- a/task4/tb_task4.sv +++ b/task4/tb_task4.sv @@ -1,7 +1,143 @@ +`define ACE 7'b0001000 +`define TWO 7'b0100100 +`define THREE 7'b0110000 +`define FOUR 7'b0011001 +`define FIVE 7'b0010010 +`define SIX 7'b0000010 +`define SEVEN 7'b1111000 +`define EIGHT 7'b0000000 +`define NINE 7'b0010000 +`define TEN 7'b1000000 +`define JACK 7'b1100001 +`define QUEEN 7'b0011000 +`define KING 7'b0001001 +`define BLANK 7'b1111111 + module tb_task4(); + logic err, resetb, slow_clock, CLOCK_50; + logic [3:0] KEY; + logic [6:0] HEX0, HEX1, HEX2, HEX3, HEX4, HEX5; + logic [9:0] LEDR; + + assign KEY[0] = slow_clock; + assign KEY[3] = resetb; + + task5 DUT(CLOCK_50, KEY, LEDR, HEX5, HEX4, HEX3, HEX2, HEX1, HEX0); + + task check; + input logic [6:0] expected_HEX0, expected_HEX1, expected_HEX2, + expected_HEX3, expected_HEX4, expected_HEX5; + input logic [9:0] expected_LEDR; + + if (HEX0 !== expected_HEX0) begin + err = 1; + $display("FAILED: HEX0 is incorrect.",); + end + if (HEX1 !== expected_HEX1) begin + err = 1; + $display("FAILED: HEX1 is incorrect.",); + end + if (HEX2 !== expected_HEX2) begin + err = 1; + $display("FAILED: HEX2 is incorrect.",); + end + if (HEX3 !== expected_HEX3) begin + err = 1; + $display("FAILED: HEX3 is incorrect.",); + end + if (HEX4 !== expected_HEX4) begin + err = 1; + $display("FAILED: HEX4 is incorrect.",); + end + if (HEX5 !== expected_HEX5) begin + err = 1; + $display("FAILED: HEX5 is incorrect.",); + end + if (LEDR !== expected_LEDR) begin + err = 1; + $display("FAILED: LEDR is incorrect.",); + end + endtask: check + + initial forever begin + slow_clock = 1'b0; + #5; + slow_clock = 1'b1; + #5; + end + + initial begin + err = 0; + + /* Reset. */ + + $display("Test 1"); + + resetb = 1'b0; + + #10; + + resetb = 1'b1; + + check(`BLANK, `BLANK, `BLANK, `BLANK, `BLANK, `BLANK, 10'b00_0000_0000); + + /* Test for natural win. Player: 9T, dealer: A2. */ + + $display("Test 2.1"); + + force tb_task5.DUT.dp.new_card = 4'd9; + + #10; + + check(`NINE, `BLANK, `BLANK, `BLANK, `BLANK, `BLANK, 10'b00_0000_1001); + + $display("Test 2.2"); + + force tb_task5.DUT.dp.new_card = 4'd1; + + #10; + + check(`NINE, `BLANK, `BLANK, `ACE, `BLANK, `BLANK, 10'b00_0001_1001); + + $display("Test 2.3"); + + force tb_task5.DUT.dp.new_card = 4'd10; + + #10; + + check(`NINE, `TEN, `BLANK, `ACE, `BLANK, `BLANK, 10'b00_0001_1001); + + $display("Test 2.4"); + + force tb_task5.DUT.dp.new_card = 4'd2; + + #10; + + check(`NINE, `TEN, `BLANK, `ACE, `TWO, `BLANK, 10'b00_0011_1001); + + $display("Test 2.5"); + + /* Load anything. */ + force tb_task5.DUT.dp.new_card = 4'd10; + + #10; + + check(`NINE, `TEN, `BLANK, `ACE, `TWO, `BLANK, 10'b01_0011_1001); + + $display("Test 2.6"); + + resetb = 1'b0; + + #10; + + resetb = 1'b1; + + check(`BLANK, `BLANK, `BLANK, `BLANK, `BLANK, `BLANK, 10'b00_0000_0000); -// Your testbench goes here. Make sure your tests exercise the entire design -// in the .sv file. Note that in our tests the simulator will exit after -// 100,000 ticks (equivalent to "initial #100000 $finish();"). + if (~err) + $display("All tests passed."); -endmodule + #10; + $stop; + end +endmodule: tb_task4 |