task5/dealcard.sv


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module dealcard(clock, resetb, new_card);
	input logic clock, resetb;
	output logic [3:0] new_card;

	logic [3:0] dealer_card;

	always_ff @(posedge clock)
		if (~resetb)
			dealer_card <= 1;
		else
			if (dealer_card == 13) dealer_card <= 1;
			else dealer_card++;

	assign new_card = dealer_card;
endmodule: dealcard