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module task4(CLOCK_50, KEY, SW, LEDR, HEX0, HEX1, HEX2, HEX3, HEX4, HEX5,
VGA_R, VGA_G, VGA_B, VGA_HS, VGA_VS, VGA_CLK, VGA_X, VGA_Y,
VGA_COLOUR, VGA_PLOT);
input logic CLOCK_50;
input logic [3:0] KEY;
input logic [9:0] SW;
output logic VGA_HS, VGA_VS, VGA_CLK, VGA_PLOT;
output logic [2:0] VGA_COLOUR;
output logic [6:0] VGA_Y, HEX0, HEX1, HEX2, HEX3, HEX4, HEX5;
output logic [7:0] VGA_X, VGA_R, VGA_G, VGA_B;
output logic [9:0] LEDR;
logic resetn, done, fillscreen_start, reuleaux_start,
fillscreen_done, reuleaux_done, fillscreen_plot, reuleaux_plot;
logic [2:0] fillscreen_colour, reuleaux_colour;
logic [6:0] fillscreen_y, reuleaux_y;
logic [7:0] fillscreen_x, reuleaux_x;
vga_adapter #(.RESOLUTION("160x120")) U0(resetn, CLOCK_50,
VGA_COLOUR, VGA_X, VGA_Y, VGA_PLOT,
{VGA_R, 2'b00}, {VGA_G, 2'b00}, {VGA_B, 2'b00},
VGA_HS, VGA_VS, VGA_BLANK, VGA_SYNC, VGA_CLK);
fillscreen U1(CLOCK_50, resetn, 3'b000, fillscreen_start,
fillscreen_done, fillscreen_vga_x, fillscreen_vga_y,
fillscreen_colour, fillscreen_plot);
reuleaux U2(CLOCK_50, resetn, 3'b010, 8'd80, 7'd60, 8'd80,
reuleaux_start, reuleaux_done, reuleaux_x, reuleaux_y,
reuleaux_colour, reuleaux_plot);
assign resetn = KEY[3];
assign start = ~KEY[0];
assign LEDR[0] = done;
assign VGA_X = fillscreen_start ? fillscreen_vga_x : reuleaux_x;
assign VGA_Y = fillscreen_start ? fillscreen_vga_y : reuleaux_y;
assign VGA_COLOUR = fillscreen_start ? fillscreen_colour : reuleaux_colour;
assign VGA_PLOT = fillscreen_start ? fillscreen_plot : reuleaux_plot;
always_ff @(posedge CLOCK_50) begin
if (~resetn) begin
fillscreen_start <= 1'b0;
reuleaux_start <= 1'b1;
done <= 1'b0;
end else if (fillscreen_done) begin
fillscreen_start <= 1'b0;
reuleaux_start <= 1'b1;
end else if (reuleaux_done) begin
reuleaux_start <= 1'b0;
done <= 1'b1;
end
end
endmodule: task4
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