diff options
| author | Warrick Lo <wlo@warricklo.net> | 2026-02-20 23:54:44 -0800 |
|---|---|---|
| committer | Warrick Lo <wlo@warricklo.net> | 2026-02-20 23:54:44 -0800 |
| commit | 55322c3deaa2de2bd0d29d7bceb2aa1d337f1351 (patch) | |
| tree | 5816ef36d9de9acbb835e78d2f1a684e7f3343b7 | |
| parent | Fix incorrect magnitude in spectrum analyser code (diff) | |
Signed-off-by: Warrick Lo <wlo@warricklo.net>
| -rw-r--r-- | general.cls | 11 | ||||
| -rw-r--r-- | images/manav.png | bin | 0 -> 8860 bytes | |||
| -rw-r--r-- | images/warrick.png | bin | 0 -> 148778 bytes | |||
| -rw-r--r-- | images/yuvraj.png | bin | 0 -> 1325810 bytes | |||
| -rw-r--r-- | macros.sty | 6 | ||||
| -rw-r--r-- | master.tex | 466 | ||||
| -rw-r--r-- | report.pdf | bin | 2201916 -> 4572920 bytes |
7 files changed, 448 insertions, 35 deletions
diff --git a/general.cls b/general.cls index 94773e1..bef7311 100644 --- a/general.cls +++ b/general.cls @@ -25,6 +25,7 @@ \RequirePackage{amsmath} \RequirePackage{unicode-math} \RequirePackage{siunitx} +\RequirePackage{derivative} % Code listings. \RequirePackage{listings} @@ -40,12 +41,16 @@ BoldItalicFont=*-BoldItalic ] -\setmathfont[math-style=ISO, bold-style=ISO, partial=upright]{STIX Two Math} +\setmathfont[ + math-style=ISO, + bold-style=ISO, + partial=upright, + StylisticSet=8 +]{STIX Two Math} \captionsetup{ labelfont=bf, - labelsep=period, - justification=centering + labelsep=period } \sisetup{ diff --git a/images/manav.png b/images/manav.png Binary files differnew file mode 100644 index 0000000..3007bce --- /dev/null +++ b/images/manav.png diff --git a/images/warrick.png b/images/warrick.png Binary files differnew file mode 100644 index 0000000..132006a --- /dev/null +++ b/images/warrick.png diff --git a/images/yuvraj.png b/images/yuvraj.png Binary files differnew file mode 100644 index 0000000..a51fd2f --- /dev/null +++ b/images/yuvraj.png @@ -38,13 +38,10 @@ \DeclareMathOperator{\arsech}{arsech} \DeclareMathOperator{\arcsch}{arcsch} -\makeatletter \let\@epsilon\epsilon \let\@theta\theta \let\@phi\phi \AtBeginDocument{ - \RenewCommandCopy{\angle}{\measuredangle} - \RenewCommandCopy{\epsilon}{\varepsilon} \RenewCommandCopy{\varepsilon}{\@epsilon} \RenewCommandCopy{\theta}{\vartheta} @@ -54,5 +51,6 @@ \undef\@epsilon \undef\@theta \undef\@phi + + \RenewCommandCopy{\angle}{\measuredangle} } -\makeatother @@ -3,12 +3,48 @@ \title{ELEC 342 Lab 1\\AC/DC Circuits and Basic Measurements} \author{Manav Khangura \and Warrick Lo \and Yuvraj Chadha} -\date{09 February 2026} +\date{} + +\DeclareSIUnit{\VAR}{VAR} \begin{document} +\vfill + \maketitle +\vfill + +\begin{centering} + \Large + + Lab Experiment: 1 \\ + Section: L2C \\ + Bench: \#7 + + \vfill + + \begin{tabular}{|c|c|c|c|} + \hline + Partners & Student ID & Participation & Signatures \\ + \hline + \hline + Manav Khangura & 16725475 & \qty{33.3}{\%} & \includegraphics[height=20pt]{images/manav.png} \\ + Warrick Lo & 47938733 & \qty{33.3}{\%} & \includegraphics[height=20pt]{images/warrick.png} \\ + Yuvraj Chadha & 23005697 & \qty{33.3}{\%} & \includegraphics[height=20pt]{images/yuvraj.png} \\ + \hline + \end{tabular} + + \vfill + + Date(s) Performed: 30 January, 13 February \\ + Date Submitted: 20 February 2026 \\ +\end{centering} + +\vfill + +\newpage + \tableofcontents \listoftables @@ -599,14 +635,14 @@ and thus, & $I_\text{3(PP)}$ (\si{\A}) & $P_\text{3(out)}$ (\si{\W}) \\ \midrule No load & 15.05 $\angle$ -1.7 & 0.08 $\angle$ 36.2 & 0.8 - & 14.19 $\angle$ -93.8 & - & 0.11 $\angle$ -224.5 && 1.0 \\ + & 14.19 $\angle$ -93.8 & 20.5 + & 0.11 $\angle$ -224.5 & 0.4 & 1.0 \\ Light load & 14.87 $\angle$ -1.8 & 0.84 $\angle$ -2.4 & 12.5 - & 13.34 $\angle$ -93.9 & - & 0.88 $\angle$ -96.2 && 11.7 \\ + & 13.34 $\angle$ -93.9 & 20.6 + & 0.88 $\angle$ -96.2 & 0.9 & 11.7 \\ Heavy load & 14.77 $\angle$ -1.8 & 1.50 $\angle$ -2.0 & 22.0 - & 13.09 $\angle$ -94.1 & - & 1.53 $\angle$ -95.6 && 19.9 \\ + & 13.09 $\angle$ -94.1 & 20.2 + & 1.53 $\angle$ -95.6 & 2.6 & 19.9 \\ \bottomrule \end{tabular} \caption[Single-phase full-wave rectifier, without a capacitor filter] @@ -615,6 +651,16 @@ and thus, \end{adjustwidth} \end{table} +\begin{itemize} + \item \textbf{What relationship between the voltage and current + peak/ripple do you observe?} \\ + The current follows the same waveform shape as the voltage. Since the + load is resistive and there is no capacitor, the current peak is in phase + with the voltage peak. As the load resistance decreases (heavier load), + the peak to peak current increases while the voltage peak to peak + remains about constant. +\end{itemize} + \begin{table}[H] \begin{adjustwidth}{-15mm}{-15mm} \centering @@ -626,15 +672,15 @@ and thus, & $I_\text{3(RMS)}$ (\si{\A}) & $I_\text{3(PP)}$ (\si{\A}) & $P_\text{3(out)}$ (\si{\W}) \\ \midrule - No load & 15.04 $\angle$ -1.7 & 0.34 $\angle$ -8.6 && 2.2 - & 19.90 $\angle$ -176.3 & - & 0.17 $\angle$ 13.1 && 2.8 \\ - Light load & 14.73 $\angle$ -1.8 & 2.5 $\angle$ -3.9 && 24.8 - & 17.73 $\angle$ -165.8 & - & 1.23 $\angle$ 203.1 && 21.7 \\ - Heavy load & 14.54 $\angle$ -2.1 & 3.80 $\angle$ -2.3 && 39.4 - & 16.73 $\angle$ -161.9 & - & 2.01 $\angle$ -159.5 && 33.6 \\ + No load & 15.04 $\angle$ -1.7 & 0.34 $\angle$ -8.6 & 2.8 & 2.2 + & 19.90 $\angle$ -176.3 & 0.29 + & 0.17 $\angle$ 13.1 & 0.16 & 2.8 \\ + Light load & 14.73 $\angle$ -1.8 & 2.5 $\angle$ -3.9 & 13.5 & 24.8 + & 17.73 $\angle$ -165.8 & 1.58 + & 1.23 $\angle$ 203.1 & 0.23 & 21.7 \\ + Heavy load & 14.54 $\angle$ -2.1 & 3.80 $\angle$ -2.3 & 18.5 & 39.4 + & 16.73 $\angle$ -161.9 & 2.30 + & 2.01 $\angle$ -159.5 & 0.36 & 33.6 \\ \bottomrule \end{tabular} \caption[Single-phase full-wave rectifier, with a capacitor filter] @@ -643,6 +689,27 @@ and thus, \end{adjustwidth} \end{table} +\begin{itemize} + \item \textbf{How do the output voltage and current ripples compare with + the previous case without the capacitor filter?} \\ + Compared to the no-capacitor case, adding the capacitor filter reduces both + the output voltage and current ripple, because the capacitor supplies current + between rectified peaks. Ripple increases with heavier load due to + faster discharge, but it is smaller than without the filter. + \item \textbf{How does the presence of a capacitor impact the input current peak?} \\ + The input current peak is increased when the capacitor is present. + Current flows in brief, high-amplitude pulses close to the AC peaks + rather than continuously throughout the cycle because the capacitor charges + only when the input voltage is greater than the capacitor voltage. + In comparison to the scenario in which the capacitor filter is not used, + this leads to significantly greater input current peaks. + \item \textbf{How does the peak of the input current change with the load current?} \\ + The peak input current rises noticeably as the load current does. + A higher recharge current is needed over a brief interval when the load + is heavier because the capacitor discharges more between AC peaks. + Higher amplitude current pulses at the input are the outcome of this. +\end{itemize} + \phantomsection \addcontentsline{toc}{subsection}{Task 4} \section*{Task 4A. Three-Phase Full-Wave Rectifier} @@ -655,12 +722,12 @@ and thus, & $V_\text{2(PP)}$ (\si{\V}) & $I_\text{2(RMS)}$ (\si{\A}) & $I_\text{2(PP)}$ (\si{\A}) & $P_\text{3(out)}$ (\si{\W}) \\ \midrule - No load & 0.09 $\angle$ 33.3 & 12.18 $\angle$ -62.2 & - & 0.16 $\angle$ -148.3 && 1.5 \\ - Light load & 0.65 $\angle$ 33.3 & 11.99 $\angle$ -50.1 & - & 0.86 $\angle$ -36.7 && 9.9 \\ - Heavy load & 1.10 $\angle$ 34.2 & 11.86 $\angle$ -40.6 & - & 1.43 $\angle$ -32.2 && 16.2 \\ + No load & 0.09 $\angle$ 33.3 & 12.18 $\angle$ -62.2 & 1.5 + & 0.16 $\angle$ -148.3 & 0.14 & 1.5 \\ + Light load & 0.65 $\angle$ 33.3 & 11.99 $\angle$ -50.1 & 1.5 + & 0.86 $\angle$ -36.7 & 0.22 & 9.9 \\ + Heavy load & 1.10 $\angle$ 34.2 & 11.86 $\angle$ -40.6 & 1.5 + & 1.43 $\angle$ -32.2 & 0.30 & 16.2 \\ \bottomrule \end{tabular} \caption[Three-phase full-wave rectifier, without a capacitor filter] @@ -668,6 +735,18 @@ and thus, \label{tab:4a} \end{table} +\begin{itemize} + \item \textbf{What relationship between the voltage and current peak/ripple + do you observe?} \\ + The ripples are the same shape and in phase as the load is purely resistive. + The voltage peak to peak remains constant while the current peak to increases. + \item \textbf{How does the input current differ from that of the single-phase rectifier?} \\ + The input current of a three-phase rectifier is smoother and more continuous + than that of a single-phase rectifier. In the single-phase case, current flows + in large pulses and drops to zero, in the three-phase case, conduction overlaps + between phases, reducing ripple. +\end{itemize} + \begin{table}[H] \begin{adjustwidth}{-15mm}{-15mm} \centering @@ -679,12 +758,12 @@ and thus, & $I_\text{3(RMS)}$ (\si{\A}) & $I_\text{3(PP)}$ (\si{\A}) & $P_\text{3(out)}$ (\si{\W}) \\ \midrule - No load & 0.08 $\angle$ 22.4 && 0.20 $\angle$ -31.0 & - & 12.58 $\angle$ -236.0 && 0.12 $\angle$ -218.5 && 1.6 \\ - Light load & 0.70 $\angle$ 28.6 && 1.02 $\angle$ -54.3 & - & 11.91 $\angle$ -95.9 && 0.83 $\angle$ 96.0 && 10.0 \\ - Heavy load & 1.17 $\angle$ 29.0 && 1.73 $\angle$ -54.4 & - & 11.63 $\angle$ -96.0 && 1.40 $\angle$ -183.2 && 16.3 \\ + No load & 0.08 $\angle$ 22.4 & 0.5 & 0.20 $\angle$ -31.0 & 0.6 + & 12.58 $\angle$ -236.0 & 0.1 & 0.12 $\angle$ -218.5 & 0.1 & 1.6 \\ + Light load & 0.70 $\angle$ 28.6 & 2.7 & 1.02 $\angle$ -54.3 & 2.0 + & 11.91 $\angle$ -95.9 & 0.3 & 0.83 $\angle$ 96.0 & 0.1 & 10.0 \\ + Heavy load & 1.17 $\angle$ 29.0 & 4.2 & 1.73 $\angle$ -54.4 & 2.7 + & 11.63 $\angle$ -96.0 & 0.4 & 1.40 $\angle$ -183.2 & 0.1 & 16.3 \\ \bottomrule \end{tabular} \caption[Three-phase full-wave rectifier, with a capacitor filter] @@ -693,6 +772,324 @@ and thus, \end{adjustwidth} \end{table} +\begin{itemize} + \item \textbf{How do the output voltage and current ripples compare with + the previous case without the capacitor filter?} \\ + With the capacitor filter, both output voltage and current become smoother. + Ripple still increases with heavier load but it remains smaller than + the case without the capacitor. + \item \textbf{How does the presence of a capacitor impact the input current peak?} \\ + The input current peak is increased when the capacitor is present. + Current only flows when the input voltage is higher than the capacitor + voltage because the capacitor keeps the output voltage close to its + maximum value. This causes short pulses as opposed to continuous conduction, + which results in larger peak input currents. + \item \textbf{How do the output voltage and current ripples compare with the + single-phase rectifier?} \\ + Compared to the single-phase rectifier, the three-phase rectifier produces + significantly smaller output voltage and current ripple. This is because + the three-phase rectifier has overlapping output between phases, + which reduces the voltage dips between peaks. As a result, + the output is smoother. + \item \textbf{How does the peak of the input current change with the load current?} \\ + The peak input current increases as the load current increases. + A heavier load causes the capacitor to discharge more current between peaks, + requiring a larger recharge current over a short time. As a result, + the input current peaks become taller under heavier load conditions. +\end{itemize} + + +\phantomsection +\addcontentsline{toc}{subsection}{Task 5} +\section*{Task 5A. Instantaneous, Real, and Reactive Power in Parallel RLC Circuit} + +The instantaneous power is given by +\begin{align} + p(t) = v(t) i(t), + \label{eq:inst-power} +\end{align} +where $v(t)$ and $i(t)$ are the instantaneous voltages and currents, +respectively. The average power is +\begin{align} + P = \frac{1}{T} \int_{\langle T \rangle} v(t) i(t) \odif{t}. + \label{eq:power} +\end{align} + +The measured RMS voltages and currents are slightly different than the ones +calculated by MATLAB, which uses the discrete version of equation \eqref{eq:power} +(see the appendix). We will use the values calculated by MATLAB here. + +For a sinusoidal signal, $P = V_\text{RMS} I_\text{RMS} \cos\phi$ and +$Q = V_\text{RMS} I_\text{RMS} \sin\phi$. We will assume that the signals +are ``sinusoidal enough''. + +\begin{table}[H] + \centering + \begin{tabular}{ccc} + \toprule + & Real Power, $P$ (\si{\W}) & Reactive Power, $Q$ (\si{\VAR}) \\ + \midrule + Task 3C, step 3 & 9.98 & 0.03 \\ + Task 3C, step 4 & 10.68 & 8.90 \\ + Task 3C, step 5 & 11.25 & -0.20 \\ + \bottomrule + \end{tabular} + \caption[Calculations for the instantaneous, real, and reactive power + in a parallel RLC circuit] + {Calculations for the instantaneous, real, and reactive power in a + parallel RLC circuit. The equations for a sinusoidal signal, + shown above, were used. RMS values are calculated from MATLAB.} +\end{table} + +The instantaneous power gives the power absorbed at any given moment in time, +while the real power is the average power absorbed or dissipated over +an interval. The reactive power is power that is temporarily stored in the +magnetic and electric fields of inductors and capacitors, respectively. + +By adding inductors, the reactive power increases since they have positive reactance +and will increase the power factor angle. Capacitors, on the other hand, decrease +the reactive power since they have negative reactive and will decrease the +power factor angle. + +\begin{figure}[H] + \centering + \includegraphics[width=0.5\linewidth]{images/5a-phasor.png} + \caption[Phasor plot of the voltage and currents for the parallel RLC circuit] + {Phasor plot of the applied voltage $V_1$, input current $I_1$, + inductor current $I_2$, and capacitor current $I_3$ for the parallel + RLC circuit. Here the voltage $V_1$ is normalised to $1$. Notice how + the phasors $I_2$ and $I_3$ effectively cancel each other.} +\end{figure} + +\begin{figure}[H] + \centering + \begin{subfigure}{0.75\linewidth} + \includegraphics[width=\linewidth]{images/5a-1-plot.png} + \caption{Plot of circuit with one resistor.} + \end{subfigure} + + \medskip + + \begin{subfigure}{0.75\linewidth} + \includegraphics[width=\linewidth]{images/5a-2-plot.png} + \caption{Plot of circuit with one resistor and one inductor.} + \end{subfigure} + + \medskip + + \begin{subfigure}{0.75\linewidth} + \includegraphics[width=\linewidth]{images/5a-3-plot.png} + \caption{Plot of circuit with one resistor, one inductor, + and three capacitors.} + \end{subfigure} + + \caption[Plots of instantaneous, real, and reactive power in the parallel RLC circuits] + {Plots of instantaneous, real, and reactive power in the parallel RLC circuits.} +\end{figure} + +\section*{Task 5B. Single-Phase Phasor Diagram for the Series RLC Circuit} + +We see that in the phasor diagrams, the inductor and capacitor voltages are +always \ang{180} apart from each other, as expected since each of them have +purely reactive loads. We see that with one resistor, the voltages $V_2$ +and $V_3$ are almost exactly \ang{\pm 90} from $V_1$. This means that the +power factor angle is near the minimum (\ang{0}) and almost all of the +power delivered is real. + +When we add the other resistors in parallel and decrease the series resistance, +the current starts to lead the voltage, meaning that less of the total power +delivered is real and more of it is reactive. Because the voltages $V_2$ and $V_3$ +have to be \ang{90} apart from the current $I_1$, we see that the shift in the +current also causes the angles of the reactive components to shift as well. + +Finally we observe that the difference between $V_1$ and $V_2+V_3$ should be +the voltage drop across the resistor(s). + +\begin{figure}[H] + \centering + \begin{subfigure}{0.45\linewidth} + \includegraphics[width=\linewidth]{images/5b-1-phasor.png} + \caption{Phasor diagram of circuit with one resistor, one inductor, + and three capacitors.} + \end{subfigure} + \hfill + \begin{subfigure}{0.45\linewidth} + \includegraphics[width=\linewidth]{images/5b-2-phasor.png} + \caption{Phasor diagram of circuit with three resistors, one inductor, + and three capacitors.} + \end{subfigure} + \caption[Phasor plots of the voltages and current for the series RLC circuit] + {Phasor plots of the applied voltage $V_1$, inductor voltage $V_2$, + capacitor voltage $V_3$, and input current $I_1$ for the series RLC circuit.} +\end{figure} + +\section*{Task 5C. Three-Phase Phasor Diagrams for Wye-Connected RL Load} + +We see that without the neutral line connected, shorting one of the load elements +will shift the phase voltage angles away from \ang{120}. Shorting the resistor +caused the angle of the unbalanced load's voltage to increase, and shorting the +inductor caused it to decrease. + +With the neutral line connected, the unbalanced current now has a return path +back to the source, ensuring that the phase voltages stay relatively close to +\ang{120} apart from each other. + +Looking at our measurements in table \ref{tab:2b}, we see that the unbalanced +loads wouldn't affect the phase voltages, since each point of connection in the +delta configuration is directly connected to a voltage source. As expected from +having unbalanced impedances, we will see differences between the phases in +current. + +\begin{figure}[H] + \begin{subfigure}{0.45\linewidth} + \includegraphics[width=\linewidth]{images/5c-1-phasor.png} + \caption{Phasor diagram of circuit with RL balanced load, \\ + neutrals disconnected.} + \end{subfigure} + \hfill + \begin{subfigure}{0.45\linewidth} + \includegraphics[width=\linewidth]{images/5c-2-phasor.png} + \caption{Phasor diagram of circuit with RL unbalanced load, \\ + shorted resistor, neutrals disconnected.} + \end{subfigure} + \caption[Phasor plots of the applied phase voltages and input currents + for the wye-connected RL load] + {Phasor plots of the applied phase voltages, $V_1$, $V_2$, $V_3$, + and input currents, $I_1$, $I_2$, $I_3$, for the wye-connected RL load. + Note that all current magnitudes have been scaled up by $10$.} + + \medskip + + \begin{subfigure}{0.45\linewidth} + \includegraphics[width=\linewidth]{images/5c-3-phasor.png} + \caption{Phasor diagram of circuit with RL unbalanced load, \\ + shorted inductor, neutrals disconnected.} + \end{subfigure} + \hfill + \begin{subfigure}{0.45\linewidth} + \includegraphics[width=\linewidth]{images/5c-4-phasor.png} + \caption{Phasor diagram of circuit with RL unbalanced load, \\ + shorted resistor, neutrals connected.} + \end{subfigure} + + \caption[Phasor diagrams of the applied phase voltages and input currents + for the wye-connected RL load] + {Phasor diagrams of the applied phase voltages, $V_1$, $V_2$, $V_3$, + and input currents, $I_1$, $I_2$, $I_3$, for the wye-connected RL load. + Note that all current magnitudes have been scaled up by $10$.} +\end{figure} + +\begin{figure}[H] + \ContinuedFloat + \centering + \begin{subfigure}{0.45\linewidth} + \includegraphics[width=\linewidth]{images/5c-5-phasor.png} + \caption{Phasor diagram of circuit with RL unbalanced load, \\ + shorted inductor, neutrals connected.} + \end{subfigure} + + \captionsetup{list=no} + \caption{Phasor diagrams of the applied phase voltages, $V_1$, $V_2$, $V_3$, + and input currents, $I_1$, $I_2$, $I_3$, for the wye-connected RL load. + Note that all current magnitudes have been scaled up by $10$.} + \captionsetup{list=yes} +\end{figure} + +\section*{Task 5D. Harmonics in AC Mains} + +\textit{For this section, we will use $V_1$ from Task 2B, with a balanced load.} + +Harmonics are distortions that occur at integer multiples of the fundamental +frequency. For AC mains in North America, this is \qty{60}{\Hz}. These are caused +by non-linear loads. In our lab, these harmonics may be caused by the power supply's +internal components being non-linear. Since our load is purely ohmic, the load should +not be contributing to the harmonic content. + +\begin{figure}[H] + \centering + \includegraphics[width=0.75\linewidth]{images/5d-plot.png} + \caption[Frequency spectrum of a sinusoidal voltage signal] + {Frequency spectrum of $V_1$ from Task 2B using MATLAB's \texttt{fft()} + function (see the appendix).} +\end{figure} + +As expected, we see a large spike at \qty{60}{\Hz} as that is our power supply's +frequency. We also notice distortions at multiples the fundamental frequency. + +\section*{Task 5E. Single-Phase AC/DC} + +\textit{For this section, we will use $I_1$ from Task 3A, + under a full load with and without a capacitor filter.} + +We see that the output current without a capacitor filter does look close to a +sinusoidal wave. However, the peaks are sharper than a sine wave, resembling +more of a sawtooth wave. + +The output current with a capacitor filter, apart from the non-zero parts +of the current, does not resemble a sinusoidal wave. + +As expected from our initial observations on the waveforms, the frequency spectrum +of the current without a capacitor filter has a single large spike at \qty{60}{\Hz}, +with a small amount of distortion at higher frequencies. On the other hand, +the current with a capacitor filter has strong harmonic content. + +\begin{figure}[H] + \centering + + \begin{subfigure}{0.75\linewidth} + \includegraphics[width=\linewidth]{images/5e-1-plot.png} + \caption{Waveform and frequency spectrum under a full load without + a capacitor filter.} + \end{subfigure} + + \medskip + + \begin{subfigure}{0.75\linewidth} + \includegraphics[width=\linewidth]{images/5e-2-plot.png} + \caption{Waveform and frequency spectrum under a full load with + a capacitor filter.} + \end{subfigure} + + \caption[Waveform and frequency spectrum of a rectified current] + {Waveform and frequency spectrum of $I_1$ from Task 3A using MATLAB's + \texttt{fft()} function (see the appendix).} +\end{figure} + +\section*{Task 5F. Three-Phase AC/DC Rectifiers} + +\textit{For this section, we will use $I_1$, $I_2$, and $I_3$ from + Task 4A, under a full load with a capacitor filter.} + +The current $I_2$ is the output of the current from the full-bridge rectifier. +The diodes ensure that all of the current flows in one single direction. For $I_3$, +the capacitor helps maintain a steady voltage and current, making it comparable +to an ideal DC current. + +\begin{figure}[H] + \centering + \includegraphics[width=0.75\linewidth]{images/5f-plot.png} + \caption[Waveform and frequency spectrum of the current in a + three-phase rectifier] + {Waveform and frequency spectrum of $I_1$, $I_2$, and $I_3$ from Task 4A + using MATLAB's \texttt{fft()} function (see the appendix).} +\end{figure} + +The $I_1$ currents in Task 5E are much closer to an ideal sinusoidal wave, +compared to here. However, we also observe that the three-phase input current +has much less harmonic content compared to the single-phase currents. + +\phantomsection +\addcontentsline{toc}{subsection}{Conclusion} +\section*{Conclusion} + +In this laboratory experiment, we were able to measure and calculate different +parameters of single-phase and three-phase circuits. We looked into real-world +applications and ideal versus non-ideal components, such as inductors, capacitors, +and rectifiers. We also saw the difference between balanced and unbalanced loads, +and their different effects in the wye and delta configurations. In addition, this +lab showed us the difference between single-phase and three-phase rectifiers. +Finally, we looked into the harmonic content of AC voltages and currents. + \newpage \appendix @@ -725,6 +1122,19 @@ and thus, stringstyle=\color{red}, caption={Phasor plot code.}, captionpos=b +]{matlab/poweran.m} + +\newpage + +\lstinputlisting[ + style=Matlab-editor, + basicstyle=\ttfamily, + numberstyle=\ttfamily\small\color{gray}, + keywordstyle=\color{blue}, + commentstyle=\color{gray}, + stringstyle=\color{red}, + caption={Phasor plot code.}, + captionpos=b ]{matlab/phasor.m} \lstinputlisting[ Binary files differ |