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| author | github-classroom[bot] <66690702+github-classroom[bot]@users.noreply.github.com> | 2025-09-10 21:59:56 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-10 21:59:56 +0000 |
| commit | a186a9a6be2cb0ece7ecf0bcc27e813f5534603d (patch) | |
| tree | a4cadf53c9e7c47290b54b0446de418a9880e17e /task1/tb_card7seg.sv | |
Initial commit
Diffstat (limited to 'task1/tb_card7seg.sv')
| -rw-r--r-- | task1/tb_card7seg.sv | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/task1/tb_card7seg.sv b/task1/tb_card7seg.sv new file mode 100644 index 0000000..3a985c9 --- /dev/null +++ b/task1/tb_card7seg.sv @@ -0,0 +1,8 @@ +module tb_card7seg(); + +// Your testbench goes here. Make sure your tests exercise the entire design +// in the .sv file. Note that in our tests the simulator will exit after +// 10,000 ticks (equivalent to "initial #10000 $finish();"). + +endmodule + |